Comparison of microwave performances for sub-quarter micron fully- and partially-depleted SOI MOSFETs

Authors

DOI:

https://doi.org/10.26636/jtit.2000.3-4.25

Keywords:

microelectronics, microwave devices, SOI MOSFET

Abstract

The high frequency performances including microwave noise parameters for sub-quarter micron fully- (FD) and partially-depleted (PD) silicon-on-insulator (SOI) n-MOSFETs are described and compared. Direct extraction techniques based on the physical meaning of each small-signal and noise model element are used to extract the microwave characteristics of various FD and PD SOI n-MOSFETs with different channel lengths and widths. TiSi2 silicidation process has been demonstrated very efficient to reduce the sheet and contact resistances of gate, source and drain transistor regions. 0.25 μm FD SOI n-MOSFETs with a total gate width of 100 μm present a state-of-the-art minimum noise figure of 0.8 dB and high associated gain of 13 dB at 6 GHz for Vds=0.75  and Pdc < 3 mW. A maximum extrapolated oscillation frequency of about 70 GHz has been obtained at Vds= 1 V and Jds= 100 mA/mm. This new generation of MOSFETs presents very good analogical and digital high speed performances with a low power consumption which make them extremely attractive for high frequency portable applications such as the wireless communications.

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References

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Submitted

2023-04-06

Published

2000-12-30

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How to Cite

[1]
M. Goffioul, G. Dambrine, D. Vanhoenacker, and J.-P. Raskin, “Comparison of microwave performances for sub-quarter micron fully- and partially-depleted SOI MOSFETs”, JTIT, vol. 2, no. 3-4, pp. 72–80, Dec. 2000, doi: 10.26636/jtit.2000.3-4.25.

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