Evaluation of MOSFETs with crystalline high-k gate-dielectrics: device simulation and experimental data

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DOI:

https://doi.org/10.26636/jtit.2007.2.812

Keywords:

crystalline high-k gate dielectric, rare-earth oxide, praseodymium oxide, gadolinium oxide, damascene metal gate, CMP, CMOS process, TSUPREM4, MEDICI, interface state density, carrier mobility, remote coulomb scattering

Abstract

The evaluation of the world’s first MOSFETs with epitaxially-grown rare-earth high-k gate dielectrics is the main issue of this work. Electrical device characterization has been performed on MOSFETs with high-k gate oxides as well as their reference counterparts with silicon dioxide gate dielectric. In addition, by means of technology simulation with TSUPREM4, models of these devices are established. Current-voltage characteristics and parameter extraction on the simulated structures is conducted with the device simulator MEDICI. Measured and simulated device characteristics are presented and the impact of interface state and fixed charge densities is discussed. Device parameters of high-k devices fabricated with standard poly-silicon gate and replacement metal gate process are compared.

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References

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Submitted

2023-06-25

Published

2007-06-30

Issue

No. 2 (2007)

Section

ARTICLES FROM THIS ISSUE

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How to Cite

[1]
F. Zaunert, R. Endres, Y. Stefanov, and U. Schwalke, “Evaluation of MOSFETs with crystalline high-k gate-dielectrics: device simulation and experimental data”, JTIT, vol. 28, no. 2, pp. 78–85, Jun. 2007, doi: 10.26636/jtit.2007.2.812.

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