An impact of frequency on capacitances of partially-depleted SOI MOSFETs

Authors

  • Daniel Tomaszewski Institute of Electron Technology, Warsaw, Poland
  • Lidia Łukasiak Warsaw University of Technology image/svg+xml
  • Agnieszka Zaręba Warsaw University of Technology image/svg+xml
  • Andrzej Jakubowski Warsaw University of Technology image/svg+xml

DOI:

https://doi.org/10.26636/jtit.2000.3-4.26

Keywords:

SOI MOSFET, small-signal models, non-quasistatic analysis, admittances

Abstract

A non-quasi-static model of partially-depleted SOI MOSFETs is presented. Phenomena, which are particularly responsible for dependence of device admittances on frequency are briefly described. Several C-V characteristics of the SOI MOSFET calculated for a wide range of frequencies, preliminary results of numerical analysis and of measurements and brief analysis of the results are presented. Methods of model improvement are proposed.

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References

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Submitted

2023-04-06

Published

2000-12-30

Issue

No. 3-4 (2000)

Section

ARTICLES FROM THIS ISSUE

License

Copyright (c) 2000 Journal of Telecommunications and Information Technology

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

How to Cite

[1]
D. Tomaszewski, L. Łukasiak, A. Zaręba, and A. Jakubowski, “An impact of frequency on capacitances of partially-depleted SOI MOSFETs”, JTIT, vol. 2, no. 3-4, pp. 67–72, Dec. 2000, doi: 10.26636/jtit.2000.3-4.26.

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