Mattausch HJ, Yumisaki A, Sadachika N, Kaya A, Johguchi K, Koide T, et al. Variation Analysis of CMOS Technologies Using Surface-Potential MOSFET Model. JTIT [Internet]. 2009 Dec. 30 [cited 2026 Aug. 25];38(4):37-44. Available from: https://www.jtit.pl/jtit/article/view/959